Session 4: Layout & Fabrication

Alex Wynn kicked off this session by tying the course together: we began with devices and SPICE to build a solid intuition for the physics, and now we’re moving into layout—how circuits turn into geometry, the polygons a foundry can actually manufacture.

He framed the two main “paths to silicon” (analog/manual layout vs. digital/RTL-to-GDS) and then walked through the practical layout toolbox (KLayout, Magic, gdsfactory) and the key file formats (especially GDSII as the final handoff). From there, the focus was the layout process itself (hierarchy, routing/metals, photolithography at a high level) and the two verification gates every design must pass: DRC (does the layout obey process rules like width/spacing/enclosure/density?) and LVS (does the layout match the schematic connectivity?).

He closed by connecting layout to the real-world fab pipeline: what “tapeout” means, what “layout acceptance” looks like from a foundry’s perspective, and a high-level view of fabrication and packaging options (bare die vs. packaged parts).

That context lands especially well in Vigo (Pontevedra- Spain) right now, since SPARC Foundry is being developed here as a III-V photonics semiconductor foundry, planned at the Valadares Technology Park with a ~1,600 m² cleanroom and targeting full operation around H1 2027.

In addition to studying these new concepts more deeply, we are expected to complete the following tasks:

• Block diagram: Sketch your project’s architecture showing major modules and data flow (e.g., Pocket Synth: button inputs → tone selector → oscillator → PWM output)
• Explore a standard cell: Open the sky130 standard cell library in KLayout and find an inverter (sky130_fd_sc_hd__inv_1). Identify metal, poly, and diffusion layers.
• Connect the dots: Pick one block from your diagram — what standard cells might implement it?

Block diagram - Ring Modulator

In the Ring Modular project of session 3, I have designed a behavioral model of the MC1496 chip using Verilog-A. My architecture focuses on the ideal mathematical multiplication of two signals to generate the ring modulation effect.

Carrier In ────> Buffer ───> ─┐
                              ├─> Ring Mod ─> Gain ─> Buffer ─> Out
Modulator In ──> Buffer ───> ─┘

I have structured my system into three functional stages that handle the signal from input to final output:

• Input Stage (Signal Conditioning): I use two electrical ports, in_car (Carrier) and in_mod (Modulator). My module treats these as instantaneous voltage variables. This stage ensures that my model captures the incoming waveforms accurately before they reach the core.

• Ring Modulator Core (Multiplication): This is the central module of my chip’s logic. I have implemented a mathematical multiplier that calculates the product of the two inputs. By doing this, I generate the sum and difference frequencies (sidebands) while inherently suppressing the original carrier and modulator signals.

• Gain & Output Stage: To make my model versatile, I included a gain parameter k and a vout_offset. This stage allows me to scale the resulting signal and add a DC reference, simulating the behavior of a real-world output buffer.

Block	Parameter / Variable	Role in the Data Flow
Input Terminals	in_car, in_mod	Capture raw electrical potentials.
Multiplier Core	V(in_car) * V(in_mod)	Perform the balanced mixing logic.
Gain Scaling	parameter real k	Control the output conversion gain.
DC Bias	parameter real vout_offset	Set the final voltage reference point.

V(out) <+ vout_offset + k * V(in_car) * V(in_mod);

(press for zoom)

Explore a standard cell

• KLayout is an open-source IC layout viewer and editor used to work with mask-layout files such as GDSII and OASIS. It’s commonly used for DRC (design rule checking), layout inspection, and verification tasks in chip design workflows.*

For this task, We have to open the SKY130 standard cell library in KLayout, locate the inverter cell (sky130_fd_sc_hd__inv_1), and inspect its layout to identify the metal, poly, and diffusion layers.

klayout /foss/pdks/sky130A/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds

I first opened KLayout and tried to load the file using the File menus.

Once KLayout was open—and realizing I didn’t understand much at first—I searched for the GDS file we needed to load at:

/foss/pdks/sky130A/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds

In the left-hand panel you’ll see the list of cells. To find the inverter, you can press any key and type “inv1” to jump to sky130_fd_sc_hd__inv_1. Once selected, right-click the cell and choose Show as New Top to display it.

In the right-hand panel you have the full list of layers, but it’s useful to filter it so you only see the layers used by this cell. To do that, right-click in the layer list and select Hide empty layers.

Wth double-click can show or hide layers, for see the components.

Identifying what each layer corresponded to wasn’t easy at first, so after checking Þórarinn’s documentation I realized that KLayout was using the sg13g2 technology by default. To fix that, we need to import the sky130A technology from Tools → Manage Technologies. Once the window is open, right-click in the left column to open the context menu, choose Import Technology, and then browse to the sky130A technology file located at:

/foss/pdks/sky130A/libs.tech/klayout/tech/sky130A.lyt

After importing the technology, the next step is to switch the layout to use it. Once I set sky130A as the active technology, the layers stopped showing up as plain numeric IDs and were labeled with clear names like poly, diff, and nwell. The display colors updated as well, which made the cell layout much easier to interpret.

With the layer names now visible, we can identify the metal, poly, and diffusion layers.

For more information about the SKY130 PDK, the SkyWater documentation website provides much more detail: https://skywater-pdk.readthedocs.io/en/main/index.html)

While browsing the documentation/website, I noticed there is also a macOS version, so I went ahead and installed it on my Mac as well.

After trying a few KLayout packages, the only one that ran correctly on my Mac was arm64ST-klayout-0.30.6-macOS-Tahoe-1-qt5MP-RsysPsys.dmg for Tahoe (26.1). This build relies on macOS’s bundled Ruby and Python (so developer tools are required) and ships with Qt5 from MacPorts embedded.

I copied the SKY130A PDK library to my Mac so I can use it and view it locally in KLayout. While browsing the SKY130A documentation, I also explored different standard cells. As an example, I opened sky130_fd_sc_hd__mux2_1, which belongs to the sky130_fd_sc_hd__mux2 family: a 2-to-1 multiplexer with inputs A0 and A1, a select line S, and one output X. In other words, the cell routes either A0 or A1 to the output depending on S. The documentation also provides the cell symbol, schematic, and GDSII layout views, and lists multiple size/drive variants (mux2_1, mux2_2, mux2_4, mux2_8).

Connect the dots

Falstad Circuit Simulator is a free, browser-based electronics tool that lets you draw and simulate circuits interactively. It shows voltages and currents in real time, so you can quickly test ideas, visualize waveforms, and understand how analog and digital circuits behave. It’s especially useful for learning and fast prototyping, although its component models are generally more simplified than full SPICE simulators.

I’m trying to design the circuit in Falstad—a Gilbert-cell multiplier—to build the ring modulator.

A Gilbert multiplier is a classic circuit that multiplies two signals:

• X input = the “signal want to scale” (often called RF or carrier)
• Y input = the “control signal” (often called LO or modulator)
• Output ≈ X · Y (around the bias point, for small signals)

In CMOS (SKY130A), build it using three blocks:

1) Block A: Convert X voltage into current (a differential pair)

Start with an NMOS differential pair:

• Two NMOS transistors share a tail current source (another NMOS biased with a constant gate voltage).
• You apply X+ to one gate and X− to the other gate.
• The pair converts the differential voltage into two currents:
  • when X+ > X−, more current goes to one side
  • when X+ < X−, more current goes to the other side

So after this block have a current that represents X, multiplication is much easier in current mode.

2) Block B: “Switch” that current using Y (the switching quad)

Next take those two currents and feed them into a switching network controlled by Y.

This network is the famous Gilbert quad (4 transistors):

• Y is applied as a differential signal Y+ / Y−
• Depending on the sign of Y, the quad routes (commutates) the currents:
  • if Y+ > Y− → current goes to output polarity A
  • if Y+ < Y− → current is flipped to output polarity B

So the quad basically multiplies the X-current by something like +1 or −1 depending on Y.

For small Y, this “flip” becomes smooth (tanh-like), and around zero you get an approximate linear multiplication.

3) Block C: Convert output current into voltage (loads)

At the output, you need something that turns current into voltage:

• PMOS active loads (common in CMOS)

or - Resistors (more linear but can cost headroom)

Show in falstad

Xschem is an open-source schematic capture tool mainly used in analog and mixed-signal IC design workflows. It lets you draw hierarchical schematics, manage symbols and netlists, and interface with simulators like ngspice (and others) for circuit simulation. It’s commonly used alongside open PDKs such as Sky130, often in flows with tools like Magic and KLayout for layout and verification.

It’s recommended to take a look at the manual, since it’s very well explained and includes easy tutorials on how to create a new simulation, work with Sky130, and more.

Also, there’s a series of very well-explained videos on YouTube by Jorge Iván Marín (in Spanish) that have been a huge help: Part 1, Part 2, Part 3.

When select a box of left and presss key e show inside or press the down row for Push schematic