Session 4: Schematic & Simulation¶
Summary¶¶
Layout → Verification (DRC/LVS) → Tape Out → Fabrication → Delivery
Homework¶
Block diagram: Sketch your project’s architecture showing major modules and data flow (e.g., Pocket Synth: button inputs → tone selector → oscillator → PWM output)
Explore a standard cell: Open the sky130 standard cell library in KLayout and find an inverter (sky130_fd_sc_hd__inv_1). Identify metal, poly, and diffusion layers.
In the container:
klayout /foss/pdks/sky130A/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds Tip: Use Edit → Find (Ctrl+F) to search for “inv_1”
Connect the dots: Pick one block from your diagram — what standard cells might implement it? (e.g., “counter” needs flip-flops, “tone selector” needs muxes)
Assignment 1¶
Block diagram: Sketch your project’s architecture showing major modules and data flow (e.g., Pocket Synth: button inputs → tone selector → oscillator → PWM output)¶
I will try to make simple piano chip.
Function¶
When user input pulse signal into the chip, the chip will generate pwm for make sound.
Concerns¶
- What number should I set to the clock frequency?
- Should I generate clock frequency inside or provide clock frequency from outside?
- How can I distort the sound?
- How much voltage for the power supply?
Assignment 2¶
Explore a standard cell: Open the sky130 standard cell library in KLayout and find an inverter (sky130_fd_sc_hd__inv_1). Identify metal, poly, and diffusion layers.¶
I opened klayout using following command.
klayout /foss/pdks/sky130A/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds
Then I tried to find the “sky130_fd_sc_hd__inv_1”. This file name means, invertor logic that has drive strength as 1. Drive strength indicates the output power. A higer number means the cell can drive more longer wires.
It is so difficult to understand the vertical layout. There are a lot of layers. And ask about layers to Gemini.
| Category | Layer Name (Example) | Simple Analogy | Description | |
|---|---|---|---|---|
| Foundation | Substrate / Active | The Land / The Road | The base silicon and the paths where electricity can flow. | |
| Gate | GatPoly | The Traffic Light | The switch that controls (On/Off) the flow of electricity. | |
| Wiring | Metal / li1 | The Highway | Horizontal wires that carry signals across the chip. | |
| Connection | Contact / Via | The Elevator / Bridge | Vertical connectors between different layers. | |
| Labels | .pin / .boundary | The Map / Address | Digital markers for the software to identify connections. |
*This table was generated by Gemini “explain about layer in KLayout”
In sky130_fd_sc_hd__inv_1, that has layers named with number.
This number descrive the process.
- 66 (Poly)
- 64 (li1 / Local Interconnect)
- 67 (m1 / Metal 1)
This page introducing about sky130_fd_sc_hd__inv_1 cell.
Try to make 3D model from GDS file.¶
I was inspired from this web site writeing about GDS3D.
I tried to run this software on my Macbook.
After running the program, it shows the window selecting the technology file.
Technology file means a text file that determine the property of each layer.
I choose sky130.txt from techfiles folder inside of GDS3D.
Then I could get 3D model. But this program can’t export 3D model file into local PC. So I tried another way to generate 3D model.
I knew that there is a plugin that shows 3D view.
From Tools/Manage Packages I found a plugin relate to 3D previewing.
It is called “gds3xtrude”.
I tried to install but I got some error.
I tried to run.... but couldn’t.
I tried to fix the error for few hours… finaly I gave up in this momemt.
I wanna 3D print like bellow… in the near future…
Additional try¶
In course material, out cool teacher Alex provided some python codes. So I tried to run those code on colab.
These codes are python code that generate chart for explaning structure of chip layers. It is cool idea for making chart using python.