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DAY1 | INTRO

DISCLAIMER :

As a start I must say that I don’t have the technical prerequisites to take this course.
I am here to take the lectures and observe to understand how the microelectronics ecosystem works.
I’ve felt Neil’s excitement about electronics and transistors and raw-materials assembly for electronic components for years, and I am finally ready to dedicated a bit of time to know more.
I wasn’t planning on doing the assignments but now that we have started I’m feeling-like I might…We’ll see…

1) Starting the container for the first-time

For DAY1, like probably many of us taking the course, I started the container to see how it looks.
I was surprised of how stable and apparently light it is. I first used the MAKE command-line interface to build a file named dice-roller from the Terminal. And it compiled as expected.
I was able to access the container from my web-browser through my local VNC client (Virtual Network Computing) at this server address : http://18.117.201.218:8093/.
I already sense that this is the type of things I hope I will never have to create/install by myself ! (EDIT : This is part of the assignments list ;-0 !! )
For a past collaboration with world-reknown artist Pierre Huyghe and the Samsung-Museum in Seul (LEEUM), I had already used VNC to monitor a mammalian-cells incubator. I already had Docker, X11 and Git installed on my computer so it worked right away.
Somehow, the access to the container through VNC has been configured by the Academany team. It was seamless.
container_terminal_dice-roller.png

2) Webpage customization

Right after that first test, I started personalizing my webpage. Also, like for many other fablab-mentors, this gitlab setup is easy for me because I’ve been using the MKDOCS + GILAB + GIT chain of tools for years.
I did the cloning of my git.fabcloud repository through the Terminal, and I did the editing of my static webpage locally using the Nano text-editor from the Terminal, and then the PULSAR (former Atom) from where I manage all my webpages.
terminal_git-cloning.png

3) The key points of this first lecture

We are now the next day after DAY1 and I am planning on exploring the set of tools that were provided to us. But first, I must write down a group of essential informations I gathered in my mind from lecture 1 :
- The Nanometer scale is where the chips-designer’s mind has to dive to.
- The frustration of designing chips and then wait for 6 to 9 months to get the hardware in hands and test it.
- The dominance of big tech in the transistors/chips race (Apple was mentioned).
- The constant feeling of chips-designers of being caught into a race that seems to never rest or end (Moore’s law still apply here apparently).
- We are talking of transistors with up to 300 millions transistor per s.mm … It is measured in MTr/mm² … for being invisible to the naked eye, this feels-like an absolute physical-abstraction.
- Analog Devices and Digital Devices were mentioned.
- Open Source Tools to Design this level of circuitry is available.
LECTURE1-SCREENSHOT.png

4) Opening the IIC-OSIC-TOOLS list

The opening of the Integrated Infrastructure for Collaborative Open Source IC Tools list is kind of overwhelming.
The first paragraph says: IIC-OSIC-TOOLS (Integrated Infrastructure for Collaborative Open Source IC Tools) is an all-in-one Docker/Podman container for open-source-based integrated circuit designs for analog and digital circuit flows. The CPU architectures x86_64/amd64 and aarch64/arm64 are natively supported based on Ubuntu 24.04 LTS (since release 2025.01). This collection of tools is curated by the Department for Integrated Circuits (ICD), Johannes Kepler University (JKU).
So we have an UBUNTU operating-system embedded into a container that provides a “collection of open source tools” for the (collaborative) design of circuitry.
This is the list of tools :
  • abc sequential logic synthesis and formal verification
  • amaranth a Python-based HDL tool chain
  • cace a Python-based circuit automatic characterization engine
  • charlib a characterization library for standard cells
  • ciel version manager (and builder) for open-source PDKs
  • cocotb simulation library for writing VHDL and Verilog test benches in Python
  • covered Verilog code coverage
  • cvc circuit validity checker (ERC)
  • edalize Python abstraction library for EDA tools
  • fault design-for-testing (DFT) solution
  • fusesoc package manager and build tools for SoC
  • gaw3-xschem waveform plot tool for xschem
  • gds3d a 3D viewer for GDS files
  • gdsfactory Python library for GDS generation
  • gdspy Python module for the creation and manipulation of GDS files
  • gf180mcu GlobalFoundries 180 nm CMOS PDK
  • ghdl-yosys-plugin VHDL-plugin for yosys
  • ghdl VHDL simulator
  • gmsh three-dimensional finite element mesh generator
  • gtkwave waveform plot tool for digital simulation
  • hdl21 analog hardware description library
  • ihp-sg13g2 IHP Microelectronics 130 nm SiGe:C BiCMOS PDK (partial PDK, not fully supported yet; xschem and ngspice simulation works incl. PSP MOSFET model)
  • irsim switch-level digital simulator
  • iverilog Verilog simulator
  • kactus2 Kactus2 is a graphical editor for IP-XACT files, which are used to describe hardware components and their interfaces
  • klayout-pex parasitic extraction for klayout
  • klayout layout viewer and editor for GDS and OASIS
  • lctime Characterization kit for CMOS cells
  • libman design library manager to manage cells and views
  • librelane successor of OpenLane(2), RTL2GDS flow scripts
  • magic layout editor with DRC and PEX
  • najaeda data structures and APIs for the development of post logic synthesis EDA algorithms
  • netgen netlist comparison (LVS)
  • ngspice SPICE analog and mixed-signal simulator, with OSDI support
  • ngspyce Python bindings for ngspice
  • nvc VHDL simulator and compiler
  • open_pdks PDK setup scripts
  • openems electromagnetic field solver using the EC-FDTD method
  • openram OpenRAM Python library
  • openroad RTL2GDS engine used by librelane
  • opensta gate level static timing verifier
  • openvaf-reloaded Verilog-A compiler for device models
  • osic-multitool collection of useful scripts and documentation
  • padring padring generation tool
  • palace 3D finite element solver for computational electromagnetics
  • pulp-tools PULP platform tools consisting of bender, verible, and sv2v
  • pygmid Python version of the gm/Id starter kit from Boris Murmann
  • pyopus simulation runner and optimization tool for analog circuits
  • pyrtl collection of classes for pythonic RTL design
  • pyspice interface ngspice and xyce from Python
  • pyuvm Universal Verification Methodology implemented in Python (instead of SystemVerilog) using cocotb
  • pyverilog Python toolkit for Verilog
  • qflow collection of useful conversion tools
  • qucs-s simulation environment with RF emphasis
  • rggen Code generation tool for control and status registers
  • risc-v toolchain GNU compiler toolchain for RISC-V cores
  • riscv-pk RISC-V proxy kernel and bootloader
  • schemdraw Python package for drawing electrical schematics
  • siliconcompiler modular build system for hardware
  • sky130 SkyWater Technologies 130 nm CMOS PDK
  • slang yosys plugin Slang-based plugin for yosys for SystemVerilog support
  • slang SystemVerilog parsing and translation (e.g. to Verilog)
  • spicelib library to interact with SPICE-like simulators
  • spike Spike RISC-V ISA simulator
  • spyci analyze/plot ngspice/xyce output data with Python
  • surelog SystemVerilog parser, elaborator, and UHDM compiler
  • surfer waveform viewer with snappy usable interface and extensibility
  • vacask a modern Verilog-A based analog circuit simulator
  • verilator fast Verilog simulator
  • veryl a modern hardware description language, based on SystemVerilog
  • vlog2verilog Verilog file conversion
  • vlsirtools interchange formats for chip design.
  • xcircuit schematic editor
  • xschem schematic editor
  • xyce fast parallel SPICE simulator (incl. xdm netlist conversion tool)
  • yosys Verilog synthesis tool (with GHDL plugin for VHDL synthesis and Slang plugin for SystemVerilog synthesis), incl. eqy (equivalence checker), sby (formal verification), and mcy (mutation coverage)
  • RF toolkit with FastHenry2, FasterCap, openEMS, and scikit-rf**.

5) Then I ran a simulation again !

I ran the make sim-fortune command again, got the right output on the Terminal, then I triggered the gtkwave fortune_teller_tb.vcd and the window opened but no wave was visible. There was en error message saying that “GTKWave couldn’t find stem information in this file”. So I think missed something.
After that, I did the cp -r command to transfer the generated files from the foss/examples folder to the foss/designs/my-project folder.
And I opened QUICKSTART.md from the Terminal with Nano.

6) Running the Docker Container Locally ?

I updated my Docket Desktop App, then installed/pull the IIC-OSIC-TOOLS, then I typed ./run-icc-osic-tools.sh and had error messages from my Terminal.
I tried running another command provided by the Docker App instead -docker run hpretl/iic-osic-tools- and the VNC Server seemed to start, at least in the Terminal. But when pasting the URLs written in the Terminal-window into a browser, non of them worked…maybe because I was already running the server locally from http://18.117.201.218:8093/ ? I disconnected from this URL, sent again docker run hpretl/iic-osic-tools and retried with the provided URL http://51c705df6e9e:80/vnc.html?host=51c705df6e9e&port=80, but no chance.
And I remembered I read about “X11 Forwarding” on https://kwantaekim.github.io/2024/05/25/OSE-Docker/ and that maybe I am missing something on this side…So I installed XQUARTZ and realized that there were still many steps to perform and that it was very late in the night. And the “docker.sock” file didn’t exist on my computer yet. So, for now I will use the container provided for the course locally here : https://tools.futures.academany.org/microservices.

7) But what is “Silicon” in the first place ?

Chips are made of si.li.con…Silicon (not “silicone”) is one of the most abundant materials on planet earth apparently. Labelled Si, it is the 14th element of The Periodic Table of Elements. You can find it on earth’s crust. It is categorized as a “Metalloids”, with w “p-block” electron configuration.
This beautiful Interactive Table’s repo is https://github.com/spirometaxas/periodic-table-cli?tab=readme-ov-file

7) FINALLY GOT GTK WORKING IN THE CONTAINER…

After hours trying to get GTKWAVE working properly - I tried to install it natively on my MBPRO to get a taste of it as well but ran into other issues while doing it - I finally managed to watch waves.
The Terminal was giving an error message about gtkwave but not specifying the type of error that was occurring. I somehow managed to make it work by modifying the path in the command gtkwave fortune_teller_tb.vdc.
Then I was able to find a possibly right combination of mouse-clicks to bring in some life into the black time-frame. Not sure of what I am looking at though.