DAY4 | FABRICATION BASICS
DAY4 : LAYOUT & FABRICATION¶
0) LIVE CLASS-NOTES UNSORTED AND INCOMPLETE NOTES
##### WE'LL GO THROUGH PHYSICAL LAYOUTS TODAY ##### OPEN SOURCE TOOLS : KLAYOUT, GDSFACTORY, MAGIC ##### COMMERCIAL TOOLS : CADENCE VIRTUOSO, SYNOPSYS CUSTOM COMPILER, MENTOR CALIBRE ##### FILE FORMATS : GDS, OASIS, LEF/DEF ##### #####LVS TOOLS : EXTRACTS DEVICES FROM LAYOUT, TRACES CONNECTIVITY, BUILDS A NETLIST, COMPARES AGAINST THE SCHEMATIC NETLIST ##### 2) LAYOUT PROCESS : ##### CORE PROCESS : WE DEPOSE A MATERIAL, WE PATTERN IT, AND WE ETCH IT. ##### PHOTOLITHOGRAPHY : PRINTING WITH LIGHT ##### CMP (CHEMICAL MECHANICAL PLANARIZATION) : WE MAKE IT FLAT BY POLISHING IT. ##### LAYOUT ON LY / LAYOUT FIRST ##### ANALOG FLOW ##### DIGITAL / RTL-TO-GDS FLOW ##### CELL-HIERARCHY ##### DRS = DESIGN RULE CHECKING (CHECKING IT THIS IS FABRICATABLE) ##### SPECIFIC CHECKS FOR : ANTENNAS, ELECTROMIGRATION, ##### LAYOUT VS SCHEMATIC CHECKING (MAKING SURE IT WORKS, NO SHORTS, ETC) ##### PROCESS DEVELOPMENT KIT (PDK) IS PROVIDED BY THE FABRICATOR
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| ME WAITING FOR NEXT CLASS ! |
